may 2005 asm2i9942p rev 0.3 alliance semiconductor 2575, augustine drive ? santa clara, ca ? tel: 408.855.4900 ? fax: 408.855.4999 ? www.alsc.com notice: the information in this document is subject to change without notice. low voltage 1:18 clock distribution chip features ? lvpecl clock input ? 2.5v lvcmos outputs for pentium ii tm* microprocessor support ? 200ps maximum tar geted output?to?output skew ? maximum output frequency of 250mhz @3.3 v cc ? 32?lead lqfp and tqfp packaging ? single 3.3v or 2.5v supply ? pin and function compatible with mpc942p functional description the asm2i9942p is a 1:18 low voltage clock distribution chip with 2.5v or 3.3v lvcmos output capabilities. the device is offered in two versions; the asm2i9942c has an lvcmos input clock while the asm2i9942p has a lvpecl input clock. the 18 outputs are 2.5v or 3.3v lvcmos compatible and featur e the drive strength to drive 50 ? series or parallel terminated transmission lines. with output-to-output skews of 200p s, the asm2i9942p is ideal as a clock distribution chip for the most demanding of synchronous systems. the 2. 5v outputs also make the device ideal for supplying clocks for a high performance pentium ii tm microprocessor based design. with low output impedance ( 12 ? ), in both the high and low logic states, the output buffers of the asm2i9942p are ideal for driving series terminated transmission lines. with an output impedance of 12 ? , the asm2i9942p can drive two series terminated transmission lines from each output. this capability gives the asm2i9942p an effective fanout of 1:36. the asm2i9942p provides enough copies of low skew clocks for most hi gh performance synchronous systems. the differential lvpecl inputs of the asm2i 9942p allow the device to interface directly with a lvpecl fanout buffer to build very wide clock fanout trees or to couple to a high frequency clock source. the oe pins will place the outputs into a high impedance state. the oe pin has an internal pullup resistor. the asm2i9942p is a single supply device. the v cc power pins require either 2.5v or 3.3v. the 32 lead lqfp and tqfp package is chosen to optimize performance, board space and cost of the devic e. the 32?lead lqfp and tqfp have a 7x7mm 2 body size with conservative 0.8mm pin spacing. * pentium ii is a trademark of intel corporation block diagram function table oe output 0 1 high impedance outputs enabled q1-q16 q 0 q17 oe (int. pullup) pecl _ clk pecl _ clk
may 2005 asm2i9942p rev 0.3 low voltage 1:18 clock distribution chip 2 of 9 notice: the information in this document is subject to change without notice. pin diagram pin description pin # pin name i/o type function 5 6 pecl_clk, pecl_clk input lvpecl lvpecl clock inputs 3 oe input lvcmos output enable/disable (high?impedance tristate) 4 nc - - no connect 32,31,30,28,27,26,24,23 ,22,20,19,18,15, 14,13,11,10,9 q0 ? q17 output lvcmos clock outputs 1,2,12,17,25 gnd supply ground negative power supply (gnd) for i/o and core. 7,8,16,21,29 v cc supply v cc positive power supply for i/o and core. all v cc pins must be connected to the positive power supply for correct operation absolute maximum rating 1 symbol parameter min max unit v cc supply voltage ?0.3 3.6 v v i input voltage ?0.3 v cc + 0.3 v i in input current 20 ma t stor storage temperature range ?40 125 c note: 1. these are stress ratings only and are not implied for fu nctional use. exposure to absolute maximum ratings for prolong ed periods of time may affect device reliability. gnd q5 q4 q3 v cc q2 q1 q0 v cc 25 24 26 27 28 29 30 31 32 1 2345678 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 gnd gnd oe nc pecl_cl k pecl_cl k v cc v cc q12 q13 q14 gnd q15 q16 q17 gnd q11 q10 q9 v cc q8 q7 q6 asm2i9942p
may 2005 asm2i9942p rev 0.3 low voltage 1:18 clock distribution chip 3 of 9 notice: the information in this document is subject to change without notice. dc characteristics (t a = 0to 70c, v cc = 2.5v 5%) symbol characteristic min typ max unit condition v ih input high voltage 2.0 v cc v v il input low voltage 0.8 v v pp input swing pecl_clk 0.6 1.0 v v x input crosspoint pecl_clk v cc ?1.0 v cc ?0.6 v v oh output high voltage 2.0 v i oh = ?16 ma v ol output low voltage 0.5 v i ol = 16 ma i in input current 200 a c in input capacitance 4.0 pf c pd power dissipation capacitance 14 pf per output z out output impedance 12 ? i cc maximum quiescent supply current 0.5 5.0 ma ac characteristics (t a = 0to 70c, v cc = 2.5v 5%) symbol characteristic min typ max unit condition f max maximum frequency 200 mhz t plh propagation delay 1.8 4.0 ns t phl propagation delay 2.0 4.3 ns t sk(o) output-to-output skew within one bank 150 ps t sk(pr) part?to?part skew 1 2.2 ns t sk(pr) part?to?part skew 2 1.3 ps t r , t f output rise/fall time 0.1 1.0 ns note: 1. across temperature and voltage ranges, includes output skew. 2. for a specific temperature and voltage, includes output skew. dc characteristics (t a = 0to 70c, v cc = 3.3v 5%) symbol characteristic min typ max unit condition v ih input high voltage 2.4 v cc v v il input low voltage 0.8 v v pp input swing pecl.clk 0.6 1.0 v v x input crosspoint pecl_clk v cc ?1.0 v cc ?0.6 v v oh output high voltage 2.4 v i oh = ?20 ma v ol output low voltage 0.6 v i ol = 20 ma i in input current 200 a c in input capacitance 4.0 pf c pd power dissipation capacitance 14 pf per output z out output impedance 12 ? i cc maximum quiescent supply current 0.5 5.0 ma
may 2005 asm2i9942p rev 0.3 low voltage 1:18 clock distribution chip 4 of 9 notice: the information in this document is subject to change without notice. ac characteristics (t a = 0to 70c, v cc = 3.3v 5%) symbol characteristic min typ max unit condition f max maximum frequency 250 mhz t plh propagation delay 1.5 3.2 ns t phl propagation delay 1.5 3.6 ns t sk(o) output-to-output skew within one bank 150 ps t sk(pr) part?to?part skew 1 1.7 ns t sk(pr) part?to?part skew 2 1.0 ps t r , t f output rise/fall time 0.1 1.0 ns note: 1. across temperature and voltage ranges, includes output skew. 2. for a specific temperature and voltage, includes output skew . power consumption of the asm2i9942p and thermal management the asm2i9942p ac specification is guaranteed for the entire operating frequency range up to 350mhz. the asm2i9942p power consumption and the associated long-term reliability may decrease the maximum frequency limit, depending on operating conditions such as clock frequency, supply voltage, output loading, ambient temperature, vertic al convection and thermal conductivity of package and board. this section describes the impact of these parameters on the junction temperature and gives a guideline to estimate the asm2i9942p die junction temperature and the associated device reliability. table 9. die junction temperature and mtbf junction temperature ( c) mtbf (years) 100 20.4 110 9.1 120 4.2 130 2.0 increased power consumption will increase the die junction temperature and impact the device reliability (mtbf). according to the system-defined tolerable mtbf, the die junction temp erature of the asm2i9942p needs to be controlled and the thermal impedance of the board/package should be optimized.the power dissipated in the asm2i9942p is re presented in equation 1. where i ccq is the static current consumption of the asm2i9942p, c pd is the power dissipation capacitance per output, () c l represents the external capacitive output load, n is the number of active outputs (n is always 12 in case of the asm2i9942p). the asm2i9942p supports driving transmission lines to maintain high signal integrity and tight timing parameters. any transmission line will hide the lumped capacitive load at the end of the boar d trace, therefore, c l is zero for controlled transmission line systems and can be eliminated from equation 1. using parallel termination output termination results in equation 2 for power dissipation. in equation 2, p stands for t he number of outputs with a parallel or thevenin termination, v ol , i ol , v oh and i oh are a function of the output termination technique and dc q is the clock signal duty cycle. if transmission lines are used c l is zero in equation 2 and can be eliminated. in general, the use of controlled transmission line techniques eliminates the impact of the lumped capacitive loads at the end lines and greatly reduces the power dissipation of the device. equation 3 describes the die junction temperature t j as a function of the power consumption. where r thja is the thermal impedance of the package (junction to ambient) and t a is the ambient temperature. according to table 9, the junction temperature can be used to estimate the long-ter m device reliability. further, combining equation 1 and equation 2 results in a maximum operating frequency for the asm2i9942p in a series terminated transmission line system, equation 4. () () [] () 4 1 3 2 1 1 2 equation v i r t t v n c f equation r p t t equation v i dc v v i dc c c n f v i v p equation v c c n f v i p cc ccq thja a jmax cc pd clockmax thja tot a j p ol ol q oh cc oh q m l pd clock cc ccq cc tot cc m l pd clock cc ccq tot ? ? ? ? ? ? ? ? ? ? ? ? ? ? = ? + = ? ? ? + ? ? + ? ? ? ? ? ? ? ? ? ? ? ? + ? ? ? + ? = ? ? ? ? ? ? ? ? ? ? ? ? ? + ? ? ? + =
may 2005 asm29942p rev 0.3 low voltage 1:18 clock distribution chip 5 of 9 notice: the information in this document is subject to change without notice. t j ,max should be selected according to the mtbf system requirements and table 9. r thja can be derived from table 10. the r thja represent data based on 1s2p boards, using 2s2p boards will result in lower thermal impedance than indicated below. table 10. thermal package impedance of the 32lqfp convection, lfpm r thja (1p2s board), c/w r thja (2p2s board), c/w still air 86 61 100 lfpm 76 56 200 lfpm 71 54 300 lfpm 68 53 400 lfpm 66 52 500 lfpm 60 49 if the calculated maximum frequency is below 350 mhz, it becomes the upper clock speed limit for the given application conditions. the following eight derating charts describe the safe frequency operation range for the asm2i9942p. the charts were calculated for a maximum tolerable die junction temperature of 110 c (120 c), corresponding to an estimated mtbf of 9.1 years (4 years), a supply voltage of 3.3v and series terminated transmission line or capacitive loading. depending on a given set of these operating conditions and the available device convection a decision on the maximum operating frequency can be made.
may 2005 asm29942p rev 0.3 low voltage 1:18 clock distribution chip 6 of 9 notice: the information in this document is subject to change without notice. package information 32-lead tqfp package section a-a dimensions inches millimeters symbol min max min max a ?. 0.0472 ? 1.2 a1 0.0020 0.0059 0.05 0.15 a2 0.0374 0.0413 0.95 1.05 d 0.3465 0.3622 8.8 9.2 d1 0.2717 0.2795 6.9 7.1 e 0.3465 0.3622 8.8 9.2 e1 0.2717 0.2795 6.9 7.1 l 0.0177 0.0295 0.45 0.75 l1 0.03937 ref 1.00 ref t 0.0035 0.0079 0.09 0.2 t1 0.0038 0.0062 0.097 0.157 b 0.0118 0.0177 0.30 0.45 b1 0.0118 0.0157 0.30 0.40 r0 0.0031 0.0079 0.08 0.2 a 0 7 0 7 e 0.031 base 0.8 base
may 2005 asm29942p rev 0.3 low voltage 1:18 clock distribution chip 7 of 9 notice: the information in this document is subject to change without notice. 32-lead lqfp package section a-a dimensions inches millimeters symbol min max min max a ?. 0.0630 ? 1.6 a1 0.0020 0.0059 0.05 0.15 a2 0.0531 0.0571 1.35 1.45 d 0.3465 0.3622 8.8 9.2 d1 0.2717 0.2795 6.9 7.1 e 0.3465 0.3622 8.8 9.2 e1 0.2717 0.2795 6.9 7.1 l 0.0177 0.0295 0.45 0.75 l1 0.03937 ref 1.00 ref t 0.0035 0.0079 0.09 0.2 t1 0.0038 0.0062 0.097 0.157 b 0.0118 0.0177 0.30 0.45 b1 0.0118 0.0157 0.30 0.40 r0 0.0031 0.0079 0.08 0.20 e 0.031 base 0.8 base a 0 7 0 7
may 2005 asm29942p rev 0.3 low voltage 1:18 clock distribution chip 8 of 9 notice: the information in this document is subject to change without notice. ordering information ordering code marking package type operating range asm2i9942p-32-lt asm2i9942pl 32- pin lqfp, tray industrial asm2i9942p-32-lr asm2i9942pl 32-pi n lqfp,tape and reel industrial asm2i9942pg-32-lt asm2i9942pgl 32- pin lqfp, tray, green industrial asm2i9942pg-32-lr asm2i9942pgl 32-pin lqfp,tape and reel, green industrial ASM2I9942P-32-ET asm2i9942pe 32-pin tqfp, tray industrial asm2i9942p-32-er asm2i9942pe 32-pi n tqfp,tape and reel industrial asm2i9942pg-32-et asm2i9942pge 32-pin tqfp, green industrial asm2i9942pg-32-er asm2i9942pge 32-pin tqfp,tape and reel, green industrial device ordering information asm2i9942pg-32-lr licensed under us patent #5,488, 627, #6,646,463 and #5,631,920. o = sot u = msop s = soic e = tqfp t = tssop l = lqfp a = ssop u = msop v = tvsop p = pdip b = bga d = qsop q = q fn x = sc-70 device pin count x= automotive i= industrial p or n/c = commercial (-40c to +125c) (-40c to +85c) (0c to +70c) 1 = reserved 6 = power management 2 = non pll based 7 = power management 3 = emi reduction 8 = power management 4 = ddr support products 9 = hi performance 5 = s td z e r o d e l ay b u ff er 0 = r ese rv ed alliance semiconductor mixed signal product part number f = lead free and rohs compliant part g = green package r = tape & reel, t = tube or tray
may 2005 asm29942p rev 0.3 low voltage 1:18 clock distribution chip 9 of 9 notice: the information in this document is subject to change without notice. ? copyright 2003 alliance semiconductor corporation. all rights reserved. our three-point logo, our name and intelliwatt are trademarks or registered trademarks of alliance. all other brand and product names may be the trademarks of their respective companies. alliance reserves the right to make ch anges to this document and its products at any time without notice. alliance assumes no responsibility for any errors t hat may appear in this document. the data contained herein represents alliance's best data and/or estimate s at the time of issuance. alliance rese rves the right to change or correct this data at any time, without notice. if the product described herein is under development, significant changes to these specifications are possible. the information in this product data sheet is intended to be general descriptive information for potential customers and users, and is not in tended to operate as, or provide, any guarantee or warrantee to any user or customer. alliance does not assume any responsibility or lia bility arising out of the applic ation or use of any product described herein, and disclaims any express or implied warrant ies related to the sale and/or use of alliance products including liability or warranties related to fitness for a particular purpose, mercha ntability, or infringement of any intellec tual property rights, except as express agreed to in alliance's terms and conditions of sale (which are available from alliance). all sales of alliance products are made exclusively according to alliance's terms and conditions of sale. the purchase of products from alliance does not convey a license under any pa tent rights, copyrights; mask works rights, trademarks, or any other intellectual property rights of alli ance or third parties. alliance does not aut horize its products for use as critical components in life-supporting systems where a malfunction or fa ilure may reasonably be expected to result in significant injury to the user, and the inclusion of alliance products in such life-supporting systems implies that the manufacturer assumes all risk of such use and agrees to indemnify alliance against all claims arising from such use. alliance semiconductor corporation 2575, augustine drive, santa clara, ca 95054 tel# 408-855-4900 fax: 408-855-4999 www.alsc.com copyright ? alliance semiconductor all rights reserved part number: asm2i9942p document version: 0.3 note: this product utilizes us patent # 6,646,463 impedance emulator patent issued to alliance semiconductor, dated 11-11-2003
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